Course level

Undergraduate

Faculty

Engineering, Architecture & Information Technology

School

Info Tech & Elec Engineering

Units

2

Duration

One Semester

Delivery mode

Internal

Class contact

1 Lecture hour, 4 Practical or Laboratory hours

Incompatible

COMP2100

Prerequisite

CSSE1000

Course coordinator

Dr Mark Schulz (m.schulz@uq.edu.au)

Assessment methods

Participation; quizzes; tutorial exercises; project and final examination

Study Abroad

This course is pre-approved for Study Abroad and Exchange students.

This course is not currently offered, please contact the school.

Course description

Minimisation of digital circuits, common MSI devices, analysis of flip-flops, design and implementation of synchronous finite state machines and sequencers, timing analysis & considerations, metastability; extensive use made of FPGAs in the laboratory experiments.

Archived offerings

Course offerings Location Mode Course Profile
Semester 1, 2011 St Lucia Internal Course Profile
Semester 1, 2010 St Lucia Internal Course Profile
Semester 1, 2009 St Lucia Internal Course Profile