School Science Lessons
Electronics 2, "UNESCO Electronics
Teacher's Guide" continued
2008-12-20
Please send comments to: J.Elfick@uq.edu.au
See:
Table of contents
39.8.0 Pulser, the astable and the
clocked bistable
39.8.1.0 Voltage outputs from the
pulser /
astable module
39.8.2.0 Clocked bistable
39.8.3.1 Four 4 bit binary counters
from
clocked bistables, binary up-counter
39.8.3.2 Four 4 bit binary counters
from
clocked bistables, binary down-counter
39.9.0 Counting circuits
39.9.1.0 Four bit binary counter
integrated
circuit
39.9.1.1 Linking the counter to a
decoder and
seven segment display
39.9.2.0 Counters of different
moduli
39.9.3.0 Switch contact bounce
39.9.3.1 Bistable circuit to
eliminate contact
bounce
39.9.4.0 One bit memory from NAND
gates and an
RS bistable
39.9.5.0 Linking two single digit
counters to
make a dual decade counter
39.9.6.0 Applications using
counting
circuits
39.9.6.1 Divide-by-N counting
39.9.6.2 Down-counting 1.
39.9.6.3 Down-counting 2.
39.9.6.4 Counting the swings of a pendulum
39.9.6.5 Controlling a motor 1.
39.9.6.6 Controlling a motor 2.
39.9.6.7 Reversing a motor at regular intervals
39.9.6.8 Flashing a lamp six times, six pips
39.9.6.9 Automatic light buoy
39.9.6.10 Electronic die
39.9.6.11 Traffic lights
39.9.6.12 Batch counting
39.9.6.13 Reaction time
Other topic headings
Timers
Position and Velocity Detectors
Sources of Sound
Sound Detectors
Circuits/Components/Instruments
Function Generators
Oscilloscopes
Advanced Instruments
Power Supplies
Light Sources
Light Paths Made Visible
Lasers
Microwave Apparatus
Computer Interface
Appendix A Bibliography
Appendix B Technical
See:
See: Interesting websites
See: Chapter 38
Electronics 1 Experiments
See:
Electronics appendix
39.8.0 Pulser, the astable and the clocked
bistable
39.8.1.0 Voltage outputs from the pulser /
astable module
See diagram 39.8.1.0
The pulser/astable module has two independent sections. The first
section is called a pulser. It has one output socket and a switch.
Below section is an astable section, also with one output socket and a
switch. Connect the lower astable output to a LED indicator as in the
diagram and move the switch at the side of the output socket to the 1
Hz position. The module must be connected to its power supply. Observe
the LED and describe the action of the astable output does by
connecting a voltmeter between the output and the negative rail and
sketching the output waveform. Move the astable switch to the 100 Hz
position. What do you observe? What do you think is happening now? If
possible, check your prediction by using an oscilloscope. Can you
measure the output frequency? Transfer the LED lead to the pulser
output socket from the astable output socket. Operate the switch and
see what happens. As in other digital circuits, the output of an
astable can be high or low. However, an astable output continually and
automatically switches between these two states. The output is stable
in neither state so it is called an astable or square wave oscillator,
square wave generator, or free running multivibrator. The astable
module produces square output voltage pulses with a mark space ratio of
about 1. This means that the period for which the output is high equals
the period for which it is low. In this experiment the two fixed
frequencies are available, about 1 Hz and 100 Hz. A constant frequency
waveform of the above kind is called a clock signal. Clock pulses from
the astable unit can be used to provide timing signals for electronic
circuits. The pulser output goes high when the switch is pressed and
returns to low when the switch is released. This provides a convenient
way of producing a single pulse and controlling its duration manually.
The pulser a bounce less switch. You can convert an ordinary switch
into a bounce less switch using a bistable circuit.
39.8.2.0 Clocked bistable
See diagram 39.8.2
In this experiment, you use the pulser to investigate a clocked
bistable. Like the bistable built from NAND gates there are SET and
RESET inputs, and 0 and U outputs. If the clock input is not used, the
new bistable behaves in the same way as the NAND gate version. Use the
pulser/astable module to investigate the behaviour of one of the
bistables on the clocked bistables module. The SET and RESET inputs
behave in the same way as with an ordinary bistable. If the SET input
(S) is taken briefly low, the bistable enters the state with Q1 = 1 and
Q2 = 0 (the SET state, in which Q1 has been set to 1). When the RESET
input (R) is taken briefly low, the state with Q1 = 0 and Q1 = 1 is
entered (the RESET state, in which Q1 has been reset to 0). However,
the bistable now has a third input, the clock input. Without the pulser
connected, use flying leads to take the SET and RESET inputs low
alternately. When the pulser is connected to the clock input and the
SET and RESET inputs are not used and the bistable changes state every
time the pulser is operated. The bistable changes state every time a
clock pulse is applied to its clock input. Remove the flying leads and
leave the SET and RESET inputs unconnected. Apply pulses one at a time
to the clock input using the pulser. What happens? Does the bistable
change state when the pulse is applied, i.e. the rising edge of the
clock pulse, or when it is switched off, i.e. the failing edge of the
clock pulse? The actual change of state occurs on the falling edge, of
an applied clock pulse, that is, when the pulser switch is released
rather than when it is pressed. Clock the bistable with the 1 Hz output
from the astable part of the pulser/astable module. What is the
frequency of the Q output? Because the change occurs o n the
failing edge of the pulse, the consequent changes in Q1 and Q2 are
summarized in diagram. 39.8.2.1. The bistable only changes state on the
failing edge of a clock pulse. One complete low high low pulse from the
Q1 or Q2 output is produced for every two complete clock pulses at the
input. So the bistable produces one output pulse for every two input
pulses. Clocked bistables make use of two bistable systems connected in
a master slave configuration. Pulses are routed alternately to the SET
and RESET inputs through clock input on the bistable.
39.8.3.1 Four 4 bit binary counters from
clocked bistables, binary up-counter
See diagram 39.8.3.1
Connect four clocked bistables together as in the diagram, and connect
a LED indicator to each of the Q outputs. Use the flying lead connected
to the RESET inputs to turn all indicators off, i.e. all Q outputs low.
Apply pulses one at a time to the left hand bistable using the pulser.
Complete the following tables, noting that the states of indicators
ABCD are entered in the order D C B A in the right hand columns. Note
that the right hand columns represent the number of pulses as a 4 bit
binary number. So the four clocked bistables act as a 4 bit binary
counter. Replace the pulser by a 1 Hz clock signal from the astable.
Watch the system continually counting from 0 to 15 in binary. Remove
the astable and reset all outputs to zero, all indicators off. Use the
pulser to apply 16 pulses one at a time to the left hand bistable.
Complete the following.
Number of clock pulses at input = 16
Number of pulses at output A = 8
Number of pulses at output B =4
Number of pulses at output C = 2
Number of pulses at output D = 1
If a clock signal of frequency 1 Hz were applied to the left hand clock
input, what would you expect the frequency of the pulses
produced at the D output to be? Use the 1 Hz output from the astable
and a stopwatch to check your prediction.
39.8.3.2 Four 4 bit binary counters from
clocked bistables, Binary down-counter
See diagram 39.8.3.2
Change the above circuit so that the clock inputs are driven by the Q2
outputs, and all the SET inputs are connected together. Use the flying
lead connected to the SET inputs to turn all indicators on, all Q
outputs high. Apply pulses one at a time to the left hand bistable.
Complete the table below, again noting that the states of the
indicators are entered in the order D C B A in the right hand columns.
Note that at each pulse, 1 is subtracted from the count represented by
the LED indicators. This is called a binary down-counter. The
experiment shows how clocked bistables can be linked to count pulses in
binary. With four bistables, counts from 0 to 15 (binary 0000 to 1111)
can be displayed. To extend the maximum count add more bistables. The
maximum count with N bistables = 2N-1.
Where clocked bistables are linked to form binary counters, feed the
external clock pulses into the left hand bistable. The Q output of this
bistable
represents the least significant bit (LSB) and the Q output of the
right hand bistable the most significant bit (MSB). This results in a
display in the reverse order to which binary numbers are usually
written. Draw a diagram showing how each of the Q outputs changes as
the clock pulses are fed into the left hand bistable. All outputs are
initially low. Each bistable changes state on the falling edge of the
pulse at its own clock input. So QA changes state on the failing edge
of the clock input; QB changes on the failing edge of QA; QC on the
falling edge Of QB; QD on the falling edge of QC. This binary
up-counter changes by adding 1 to the count for every clock pulse.
When you feed 16 pulses into the left hand bistable one at a time they
will obtain the following results:
Number of clock pulses at input =16
Number of pulses at output A = 8
Number of pulses at output B = 4
Number of pulses at output C = 2
Number of pulses at output D = 1
Each bistable in the chain produces one output pulse for every two
pulses at its clock input. If 1
6 pulses per second arrive at the input of the first bistable, 1 pulse
per second will leave the Q1 output of the fourth bistable. The system
divides the input frequency by 16 so it is called a divide by 16
counter.
A single bistable divides the frequency of a clock signal at its input
by 2, while chains of two, three, four or five bistables provide
division by 4, 8, 16 and 32 respectively. A divide-by-N counter will
produce output pulses at a frequency 1/N times the input frequency. If
it contains x bistables, then 2x = N.
Divide-by-N counters are used in electronics systems to generate
signals of exact multiples of each other. For example, the signal from
a master oscillator operating at 16 MHz can be divided to produce the 1
MHz clock signal driving a microprocessor.
39.9.0 Counting circuits
39.9.1.0 Four bit binary counter integrated
circuit
See diagram 39.9.1.0
Connect the pulser to the input of a 4 bit counters of the Binary
Counter module. Monitor each of the four output lines with a LED
indicator.
If any of the indicators are lit, use a flying lead to take the RESET
input briefly high. The counter can be reset to zero anytime by taking
this RESET input high. Apply pulses to the counter one at a time. Note
whether the display changes on the rising or failing edge of the clock
pulse. Send 16 pulses to the counter and check that the indicators
correctly display the number of pulses in binary. Replace the pulser by
the 1 Hz output signal from an astable unit. Watch the system
repeatedly cycle from 0000 through to 1111 and back to 0000 again. With
the 1 Hz signal still connected, disconnect indicators A, B and C. What
is the frequency of the output signal at D? Is this what you expect?
Explain.
39.9.1.1 Linking the counter to a decoder
and seven-segment display
See diagram 39.9.1.1
Remove the LED indicators and connect the Seven Segment Decoder/Display
module as shown below.
First reset the counter by taking the RESET input briefly high. Then
use the pulser to apply pulses one at a time to the clock input of the
counter. Copy down the display after each pulse.
The modules may display blank or show strange patterns for the numbers
10 to 15 because the BC D to seven segment decoder and the seven
segment display are only designed to show the scale of ten (decimal)
digits 0 to 9 (binary 0000 to 1001). The binary numbers 1010 to 1111
are generated by the counter, but result may be a blank display or odd
patterns.
Instead of using a chain of bistables to count pulses, you can use a
single integrated circuit. For example the IC used in the 4 bit binary
counter module does the job of four bistables in sequence. It counts
from 0000 to 1111, then resets itself automatically to 0000 and starts
counting up again. The number of different states a counter goes
through before repeating is called the modulus of the count. The 4 bit
binary counter changes state on the failing (negative) edge of an
applied clock pulse and has a RESET input which is normally held low
and taken briefly high to set all outputs to zero. The advantage of
negative edge clocking in the present course is that several of these
counters can be directly cascaded if mufti digit readouts are required.
Clock pulses for the second stage are provided by the D output of the
first stage. Since this D output has a failing edge after every
sixteenth pulse, the system continues to count upwards in the required
manner. With counters which change state on the rising edge of a clock
pulse, an inverter would be needed between each stage.
A multidigit binary to scale of ten (binary coded decimal or BCD)
counter can be produced in much the same way except that it is
necessary to reset each stage after it has received 10 pulses at its
input. This is achieved by using an AND gate (made from two NAND gates)
as shown below. The output from the first NAND gate is used to clock
the next stage.
39.9.2.0 Counters of different moduli
See diagram 39.9.2
Connect an AND gate (use two NAND gates) between the B and D output
lines and the RESET input. Apply a 1 Hz signal from the astable unit to
the clock input of the counter. The system now counts from 0 to 9 and
then resets itself and starts counting upwards from zero again.
Connect
the same AND gate so that the counter:
1. counts to 2 and resets,
2.
counts to 4 and resets,
3. counts to 5 and resets,
4. counts to 8 and
resets.
In each case draw a diagram showing the way you connected the
AND gate.
How many AND gates do you need to make a counter which:
1.
counts to 1 and resets,
2. counts to 3 and resets,
3. counts to 6 and
resets
4. counts to 7 and resets?
In each case draw a diagram of the
connections, and check that the system really does behave in the way
you expect.
Build and test counters of different moduli using the 4-bit Counter
module and NAND gates. The key to understanding this work is the 4-bit
binary counting sequence. Consider, for example, a counter with modulus
5.
The numbers 0 to 4 must be displayed. The counter must then reset to
zero immediately the next state (0101) appears at the outputs. This is
done by using an AND gate (or two NAND gates) to detect when the A and
C digits are both 1 and provide the high state necessary to reset the
counter.
(2) Counters of other moduli are designed in the same way. The
connections for all moduli between 2 and 9 are as follows.
The only time more than two NAND gates are required is for the modulo
7.
So high states must be detected on three lines. Two AND gates (or four
NAND gates) will do the job.
39.9.3.0 Switch contact bounce
See diagram 39.9.3
In the circuit a flying lead is connected to a clock input of the 4-bit
Binary Counter module. Set up the circuit with the flying lead
connected initially to the negative rail. Note the number displayed and
then pulse the clock input once by touching the lead to the positive
rail and then the negative rail. Note the number displayed again. Do
this several times. Does the count displayed increase in steps of
one?
39.9.3.1 Using a bistable circuit to
eliminate contact bounce
See diagram 39.9.3.1
1. Connect the bistable circuit, made from two NAND gates, as shown below.
Note that the 0 output of the bistable is connected to the clock
input
of the counter. Connect a flying lead to the negative rail. Use the
flying lead to send pulses to the counter by touching it first to input
1 and then to input 2 and so on. Does the count displayed now increase
by one each time? Explain the action of the bistable in the above
circuit. In work with clocked bistables and counters you may use a
pulser unit to provide the necessary clock pulses. The purpose of the
present experiment is to show why such a special unit is necessary, and
the way it is constructed. In the first part of the experiment you will
find that the counter behaves erratically. The count displayed may
increase by more than one for each cycle of operation. This is because
of contact bounce. Any ordinary switch also suffers from contact
bounce. Experiment 39.9.3.0 would be better done
with an SPDT switch rather than a flying lead, as in the notes which
follow. Contact bounce arises when the moving contact of the
switch bounces on and off a fixed contact before settling in position.
This results in the production of a series of pulses rather than a
single "clean" pulse. (Note that the clock input is normally high when
unconnected.) Note that, K the clock input is normally high (which it
is on the counter module), the extra pulses are positive going and are
generated when the switch goes to as low position. Contact bounce does,
of course, also occur when the switch goes to its high position, but in
this case extra pulses are unlikely to be produced. This is because the
clock input itself will remain in its normally high position during
bouncing unless the bounce is so severe that the moving contact touches
the low voltage line again. Contact bounce plays havoc with circuits
such as clocked bistables and counters, because the extra pulses are
real pulses which clock the system. 2. Hence it is necessary to use
some
electronic circuitry to remove the effect. In the present experiment
two NAND gates connected as a bistable are used. The R and S inputs
are normally high and that the R input must be taken briefly low to
enter the state with 0 = 0 and 5 = 1. To enter the other stable state
(0 =1 and 5 = 0) the S input must be taken briefly low. The key point
in the present application is that once the S or R input has been taken
low a first time, taking the same input low a second or further time
has no effect, provided the switch does not move back to its original
position in between. Thus if the bistable is initially in the
state with 0=0 and the moving switch contact is pushed from position 2
to position 1, the S input will be taken low and 0 will be set high. K
the moving contact bounces on and off the fixed contact at position 1,
but not so severely as to touch 2 again, the S input will be taken
repeatedly low, but this will not affect the state of the bistable (0
remains high). When the moving contact is pushed back to position
2, the R input will be taken low and 0 will be reset to zero. Again,
contact bounce will have no effect because the bistable was reset at
the moment of first contact and taking the R input low several times in
succession produces no further changes. In this way a single low high
low pulse is produced at the 0 output every time the moving contact is
moved from position 2 to 1 and back to 2 again. The single pulser
output on the Pulser/Astable module used in this course is, in fact,
made in this way to avoid contact bounce.
39.9.4.0 One-bit memory from NAND gates and an
RS bistable
See diagram 39.9.4
Set up the circuit below and connect a 1 Hz signal from the
Pulser/Astable module to the data input and a flying lead to the hold
input. Take the hold input high. What happens? Now take the hold input
low. What happens? Try to explain how the circuit works. The way the
circuit works can be explained as follows. Suppose first the HOLD input
is high. Then when the data input is high, the voltage levels are as
shown below. When the data input is low, the voltage levels are as
follows: Thus the final output FOLLOWS the input (the two indicators
are either both high or both low). When the data input is high, 0 is
high. When the data input is low, 0 is low. However, making the HOLD
input low, you have the following.
With high data input
With low data input
In these two cases, whether the data input is high or low, the outputs
of the two NAND gates are both high. However, the RS bistable only
changes when one of the points S or R goes low, so the output stays as
it was when the hold went low. What was then showing is still showing:
it is HELD, or MEMORIZED.
39.9.5.0 Linking two single digit counters
to make a dual decade counter
See diagram 39.9.5
The aim is to produce a counter which will display counts from 0 to 99
on two seven segment LED displays using an astable (to produce the
pulses to be counted), two binary counters, two seven segment displays
with decoders and a Quad NAND module. The dual decade counter above
consists of two linked binary counters each with its own AND gate and
decoder/display. In practice, a dual decade counter would be made using
BCD counters. BCD counters count from 0000 to 1001 only and are then
reset to zero by circuitry inside the chip. External NAND gates are not
then required. The BCD chip also has a reset facility which allows the
outputs to be set to 0000. A dual decade counter would normally
incorporate hold/follow latches as well. A hold/follow latch is also
called a "storage latch" or a "storage register'. The chip contains 4
of the memory circuits of 39.9.4 each sharing a common hold input. When
the hold input is taken low, the output voltage levels of the latch are
held at the values present at the inputs at the moment "hold" went low.
This has the effect of freezing "the display so that the numbers can be
read. Naturally the use of latches is essential when the input
frequency exceeds a few Hz. When a dual decade counter is used with an
astable of known frequency, the combination provide a versatile timing
facility. For example, when used with an input signal of frequency 100
Hz, the counter registers time in steps of 0,01 s up to a maximum time
of 0.99 seconds.
39.9.6.0 Applications using counting
circuits
39.9.6.1 Divide-by-N counting
Build a divide by 256 counter from two 4 bit binary counters. Use the
counter to measure the frequency of the a.c. mains. Provide with a
suitable source of mains frequency pulses for this experiment. The
simple haft wave rectifying circuit shown above works well, but the
transformer supply for it must be different from any used to provide a
stabilized power supply for the modules. An alternative is to use the
100 Hz output of the astable. Only positive "g" pulses should be
applied to the input of the NAND gate if K is not to be damaged. Check
circuits to ensure correct polarity before switching on the a.c.
supply. Also, the peak voltage across the 1 kQ resistor should not
exceed the power supply voltage applied to the modules. For modules
operating from 5 V, a 2 V a.c. supply to the half-wave rectifier should
be adequate. For modules operating from 6 V, a 4 V a.c. supply should
be satisfactory. Measure the frequency at which indicator D on the
second counter flashes. They can simply use a stopwatch and measure the
time for cycles, e.g. 10. A typical measurement is about 10
cycles in 50 s. The frequency f of the mains is then calculated as: f =
10/50 x 256 = 51.2 Hz.
39.9.6.2 Down counting
Using a 4-bit binary counter, design a circuit which counts down from
15 (binary 1111) to zero (0000). Use LED indicators to display the
count.
39.9.6.3 Down counting (2)
Using a 4-bit binary counter, design a circuit which counts down from 7
(binary 111) to zero (000) and then returns to 7. Display the count
with a 7-segment indicator. The D input of the 7-segment display must
be connected to the negative supply rail to display the digits 0 to
7.
39.9.6.4 Counting the swings of a pendulum
Build a circuit which will count the swings (i.e. 1 2 -cycles) of a
pendulum. Use a 4-bit counter and a 7-segment Decoder/Display module
for this. The circuit above will count the "1 2 -cycles of the pendulum
if a light beam is arranged to fall on the LDR and if the pendulum bob
passes through the light beam. If the counter is set to zero, it will
count "1" the first time the bob passes through the beam, no matter
from where the bob is released. Try to add to the circuit so that
counting starts following the first interruption of the beam. Replacing
the direct connection between X and Y above with the circuit opposite
should result in the first transit activating the counter if the 0
output of the bistable is initially reset to 0 by means of the flying
lead.
39.9.6.5 Controlling a motor
See diagram 39.9.6.5
Built a circuit which turns an electric motor on for 10 s in every 20
s. Note that the negative going pulse, produced by the NAND gate
connected to the B and D outputs of the module 10 counter every time
the count reaches ten, is used to change the state of the clocked RS
bistable. Since the 0 output is therefore alternately high for 10 s and
low for 10 S, the motor is on for 10 s in 20 s.
39.9.6.6 Controlling a motor (2)
Build a circuit which turns an electric motor on for 5 s in every 20
s. Note that the first bistable is driven by a module 5 counter
so that its 0 output is high for 5 s and then low for 5 s. The 0 output
of the second bistable is high for 10 s and low for 10 s. The output of
NAND gate 1 is therefore low for 5 s in every 20 s.
39.9.6.7 Reversing a motor at regular
intervals
Design a control circuit for an automatic liquid mixer. The circuit
should reverse the direction of rotation of the mixer motor every 5
s. Note that the circuit is similar to that of 39.9.6 except
that a module 5 counter is required and the relay switch is used with 2
batteries to reverse the motor.
39.9.6.8 Flashing a lamp six times, six
pips
Design a circuit which will flash a lamp six times when a switch is
pressed and released, using the 1 Hz output from an astable. Then
modify the circuit so that it will sound a buzzer six times. The
counter counts 6 input pulses and NAND gate 3 then causes the AND gate,
formed by gates 1 and 2, to close. Pressing the switch resets the
counter and the process repeats. To sound a buzzer 6 times, the
LED indicator should be replaced by the buzzer. See note (2) of
39.2.2.1 for possible difficulties with driving buzzers from CMOS
gates. A
non-inverting buffer may be needed.
39.9.6.9 Automatic light buoy
A warning buoy in a shipping channel is to have a light which flashes.
It is to be on for 1 s and off for 4 S. Design a circuit which will do
this. Use the Pulser/Astable module to provide 1 Hz pulses. Then adapt
the circuit so that the light only operates when it is dark.
39.9.6.10 Electronic die
Build an electronic die using clocked RS bistables, an astable, a
seven-segment decoder/display and NAND gates. The display should
normally cycle from 1 to 6 at high speed. When the hold input on the
input gate is taken low, the display should freeze and show the result
of the "Throw". The tricky part of this experiment is to make the
display count from 1 to 6, i.e. to reset the count to 1 rather than to
0 after each cycle. This can be done using three clocked RS bistables
as a module 7 counter and resetting just the two providing the B and C
inputs when the count reaches 7. Note that NAND gates 1, 2 and 3 form a
3 input NAND gate which provides the necessary negative going reset
pulse when all three 0 outputs are high. The unused D input to the
decoder/display must not be allowed to float in this application, since
it will assume a high state and upset the display. Tie this input
low.
39.9.6.11 Traffic lights
Build a control circuit for a set of traffic lights. Use the 1 Hz
astable output for all timing, and the red, yellow and green LEDs on
the Indicator module for lights. The lights must, of course, come on in
the normal traffic light sequence (yellow, red, red and yellow, green,
and back to yellow again). A number of different solutions to the
traffic lights problem is possible. The above is one of the simplest.
To see how the circuit works, consider the following timing
diagram. The yellow LED is driven directly from the astable, and
lights when the clock is high. With the red LED driven from the 0
output, the initial yellow, red, yellow and red output sequence is
obtained during the first three half cycles of the clock. On the fourth
half cycle, both yellow and red are off (as required), and the green
LED must be turned on. At this time, both the clock and 0 are low, so
an AND gate driven by and the inverse of the clock will provide a high
output to light the green LED.
39.9.6.12 Batch counting
Articles in a factory are delivered from an assembly room to a packing
room along a conveyor belt. Design a system which will stop the
conveyor belt (turn off its motor) every time a batch of five articles
has entered the packing room. Provide a switch in this room which can
be used to restart the conveyor belt motor once the articles have been
removed from the belt for packing. In a practical system, the LDR
would perhaps be placed at the entrance of the packing room. Each
article would be counted as it interrupted a light beam failing on the
LDR when entering the packing room. The NAND gate connected to
outputs A and C of the module 5 counter produces a negative going pulse
every time five articles have been counted. This pulse resets an RS
bistable which turns the conveyor belt motor off. A manual switch is
used to set the RS bistable to re-start the motor.
39.9.6.13 Reaction time
Build a circuit which can be used to test people's reaction times. A
switch should be provided which starts a dual decade counter (see
39.9.5) counting 100 Hz pulses from an astable. This switch is operated
secretly by the person controlling the test. A second switch should
freeze the display. The person under test operates the switch when the
display changes. The dual decade module should then show
the time difference between the two switch closures, i.e. the reaction
time of the person under test. The principle of a solution is
shown above. First, a flying lead is used to reset the dual decade
counter to zero. Then the person controlling the test opens the NAND
gate 1 by disconnecting lead L from the negative rail. The person under
lest responds directly the display is seen to change by using switch S
to take the input of NAND 2 low. This freezes the display with the
reaction time shown in one hundredths of a second. In practice,
the experiment is likely to be unreliable because of contact bounce
problems. Bounce free switches could be made but that would require
four more NAND gates. An alternative method is to replace the
input circuitry to the left of X in the circuit above with that
below. The NAND gate is closed by pressing S so making the 0
output low. Counting is started by clocking the bistable once from the
pulser output, so opening the NAND gate. The gate is closed again by
pressing S when the counter is seen to start. The experiment can be
extended in various ways. One possibility is for a buzzer to sound at
the same time as the NAND gate opens. The reaction of the person under
test to an audible signal can then be investigated, and compared with
the response to a visual stimulus.
The experiments below were originally published as "Document Series No.
40 Electronics Teacher's Guide" by John Lewis for UNESCO Science and
Technology Education. ED-91/WS-1 UNESCO Paris, 1991, and later edited
by Dr John Elfick, School of Education, University of Queensland,
Australia.
Preface
Electronics Teacher's Guide has been specially written by John Lewis
for UNESCO. He was one of the leaders of the well known Nuffield
O-Level Physics Curriculum project and later the director of the
Science and Society Experiment in the United Kingdom. He has
contributed world wide to many innovations in science education. Mr.
Lewis has been Secretary of the International Commission of Physics
Education, which awarded him its medal in 1988, and Secretary of the
Committee on the Teaching of Science of the International Council of
Scientific Unions. His committee organized the Bangalore Conference on
"Science and Technology Education and Future Human Needs" in 1985. He
was awarded the OBE for his work in science education.
This work is based on material developed at the Independent Schools
Microelectronics Centre (ISMEC) at Westminster College, Oxford. ISMEC
which no longer existed when its work was completed in 1986. Its place
has been taken by the Westminster Centre for Design and Technology.
Unesco wishes to express its appreciation first to John Lewis, Michael
Summers and Geoffrey Foxcroft for the original development of the
material and then to John Lewis, Geoffrey Foxcroft and David Haynes for
the development of this modified version for UNESCO.
Electronics as part of the Physics Curriculum
by John Lewis
Whereas most educators are now agreed on the importance of including
electronics within the school curriculum, there are conflicting views
on how this should be done. Traditionally, of course, some electronics
has always been part of school physics. In the past it has largely been
confined to the higher levels, but most people would now agree that a
much wider exposure is necessary (in fact many would argue that
electronics should be a compulsory part of the curriculum). The problem
with the traditional approach to electronics within physics is that it
has been centred on particular devices and their characteristics. In
earlier days, valves and their uses for rectification and amplification
were a focus of attention, and more recently, transistors (both bipolar
and FET) and other solid state devices have been prominent in physics
curricula at advanced levels. However, any approach which places too
much emphasis on the structure and characteristics of specific devices
suffers from two major drawbacks. The first is that these devices are
likely to be of only transient importance (witness valves, or indeed,
transistors). Secondly, not enough time will be left over to provide
experience of designing and building electronic systems to do useful
tasks. The latter is vital if students are to acquire some appreciation
and understanding of the power of modern electronics, of its role in
technology, and of its influence on human societies. Of course, not all
physics courses have adopted this traditional device centred approach.
The most notable exception is the Nuffield Advanced Physics course,
which pioneered an approach to electronics teaching using conceptual
building bricks. Electronics is still about logic gates, bistables,
astables, counters, and so on, even though you now use integrated
circuits instead of valves or transistors. The real insight of the
Nuffield course (which in fact used transistors) was to realize this
basic conceptual durability in the face of rapid technological
development at the device level. It is this kind of approach, called
the systems approach, which is now so urgently required at an earlier
stage. Despite the success of the systems approach within the Nuffield
course, there are still many physics teachers who argue that this kind
of electronics has little to do with physics, and has no place in a
physics curriculum. Before considering this fundamental question, let
us first identify some of the very practical advantages of keeping
electronics (but now a systems approach) within school physics courses.
Of paramount importance is the difficulty of finding time for a new
subject, electronics, within an already crowded school curriculum.
This problem is resolved if electronics is taught within the existing
curriculum structure (physics, of course, is part of that structure).
One has only to look at the needs of electronics syllabuses to realize
the tremendous overlap with the content of physics syllabuses. The
physics syllabuses have always dealt with the basic ideas necessary for
a sound understanding of electronics and it uses current, voltage,
resistance, power, potential dividers, capacitors, transducers,
feedback, measurement and instrumentation, and so on. Electronics can
show how these ideas are used and usefully applied, and should be
accepted as part of the physics curriculum in the same way that optical
instruments have always been accepted. If it accepted, problems of
repetition and of overcrowding the curriculum are removed. In practice,
physics teachers are most likely to have had the widest exposure to
electronics, and are the people who most often teach electronics in
schools. At the time of writing, there is a shortage of qualified
physics teachers, and it is undesirable that they should be taken away
from physics and asked to teach electronics. This again argues against
the introduction of electronics as a separate subject in the school
curriculum. All of the above are practical reasons for making
electronics an integral part of physics courses. So what contrary
arguments are there? Why do so many physics teachers themselves resist
the introduction of some electronics into the school physics
curriculum? A key argument put forward is that physics and electronics
(as manifested in the modern systems approach) are fundamentally
different. Whereas physics is concerned with analysis and explanation
of the physical world, electronics is concerned with synthesis and
application, with the work of the engineer, rather than the physicist.
How valid is that argument? How relevant is it in an educational
context? It is suggested that such an argument is based on an
inadequate and rather outdated view both of physics itself and of the
desirable goals of a modern school physics curriculum. In the first
place, the rather "pure science" conception of physics as a discipline
concerned solely with analysis and explanation of the physical world
does not adequately reflect the activities of most of the world's
physicists. If you accept that a discipline should be defined, at least
in part, by what its practitioners actually do, then the need for a
wider view soon becomes apparent. in practice, very few physicists are
engaged in fundamental research directed at explanation of the natural
world. Most are concerned with using accepted ideas and theories with
their creative use for solving problems in industry, with development
rather than pure research. Such activities often have an applied
engineering flavour, but they are the legitimate concern of physics and
physicists. It is this broader view of physics that should be reflected
in the goals, and therefore the processes and content, of a school
physics curriculum. Indeed many would argue that this is the only way
in which the subject can be made relevant and useful. Of course, the
skills required of even the research physicist have never been
predominantly analytical. Physicists at all levels are concerned with
synthesis whenever they are applying physical ideas to solve problems.
Indeed, that key element in scientific method, the generation of
hypotheses, is inextricably concerned with both analysis and
synthesis. Likewise, it is
equally wrong to consider electronics as being concerned predominantly
with synthesis. There will inevitably be elements of analysis (for
example,
thinking out how a particular system functions in terms of simpler
conceptual building bricks) in both the work of the electronics
engineer and in
electronics within the classroom. There is one last point which should
be of great concern to all physics teachers. Considerable evidence now
exists to suggest that a systems approach to electronics generates
widespread enthusiasm and interest among students of all backgrounds
and abilities. The inclusion of electronics can do nothing but
strengthen physics as a school subject. At the moment there is a
considerable danger that physics will lose electronics altogether, and
with it a natural source of motivation and involvement. It would be a
sad day for physics if this were to happen.